Atmel's New 200 MIPS ARM9 MCU Draws Only 2.5 uA Standby, and 350 uA/MHz at Maximum Performance
Rousset, France, November 15 (ots/PRNewswire)
- On-chip LCD, USB Host/Device, 160kByte SRAM and Peripheral DMA Controller Target Wireless Handheld Terminals Like Point-of-Sale Applications
Atmel(R) Corporation (Nasdaq: ATML) today announced the industry's first ultra low-power, deterministic microcontroller, the AT91SAM9261 Smart ARM Microcontroller (SAM), based on the ARM926EJ-S processor.
Targeted at low power, high throughput wireless handheld applications, such as wireless PoS devices, the AT91SAM9261 consumes only 2.5 uA in standby mode. Operating at 500Hz it draws 400 uA. In industrial temperature range, its current consumption at 200 MIPS with all peripherals turned on is just 65 mA. The AT91SAM9261's throughput and its extended instruction set with DSP extensions allow complex DSP functions, such as biometrics, voice recognition, software modems, or encryption/decryption algorithms like RSA, to be executed very quickly in burst mode, so the system can be shut down much of the time.
In a typical PoS application with a four-hour battery life, such as a rental car-return processing module, these new MCUs can extend battery life by as much as a factor of 4 to 16 hours.
Multi-Layer AHB Internal bus architecture and dedicated peripheral DMA -- Data throughput is significantly increased by the parallelism provided by the multi-layer bus matrix. The bus matrix connects five Advanced High-Performance Bus (AHB) masters (processor instruction and data busses, peripheral DMA controller (PDC), and two dedicated DMA's for the USB Host and LCD Controller), to the on-chip peripherals and internal or external memories. Atmel has extended the peripheral DMA controller used on its ARM7-based MCUs to include nineteen PDC channels on the AT91SAM9261. The PDC off-loads data transfer operations between the peripheral and memories from the CPU, dramatically increasing data rates and freeing the ARM9 CPU for compute intensive tasks.
This unique combination of the internal multi-layer AHB bus architecture and the dedicated peripheral DMA controller maximizes processor throughput and optimizes overall system power consumption. For example, the Peripheral DMA controller can facilitate data transfers between the on-chip SRAM and peripherals while the processor simultaneously executes code out of its cache or does a cache line fill. Alternatively, the processor can execute code out of on chip SRAM deterministically in parallel to the peripheral DMA controller streaming data from peripherals to external memory.
Generous On-chip SRAM and Flexible TCM Implementation Support Determinism, -- Atmel's AT91SAM9261 has 16 Kbytes of data cache, 16 Kbytes of instruction/write buffer cache, 160 Kbytes of 200 MHz, single cycle access SRAM, and 2 Kbytes of internal DPRAM dedicated to the USB Device. Atmel has exploited the ARM926EJ-S's Tightly Coupled Memory (TCM) architecture that allows traditional (non-cache) SRAM to be connected directly to the ARM processor, with no latency. Separate, transparent, easy to use instruction and data caches support WinCE and Linux operating systems, while the TCM SRAM blocks are ideally suited for deterministic real-time operating systems. The on-chip 160 Kbytes of SRAM can be partitioned in multiples of 16 Kbytes blocks as Instruction TCM, Data TCM, or a buffer for the on-chip peripherals. It gives the programmer maximum flexibility to optimize system performance and power consumption.
Built-in LCD Controller -- The majority of PoS or other data input devices have graphical interfaces that utilize small LCD screens with menus. The AT91SAM9261's on-chip LCD controller supports black-and-white and up to 16M colors, driving active TFT and passive STN LCD displays with a resolution of up to 2048x2048. The on-chip 160 Kbytes of SRAM can be configured as a frame buffer, thereby minimizing the Bill of Material costs associated with an external frame buffer and increasing the battery life.
Full-speed USB Host Controller -- A USB host controller provides a seamless interface to any USB device, including mouse, keyboard, bar code reader, wireless LAN, DECT or Bluetooth modem. Its dedicated DMA controller and the multi-layer AHB internal bus architecture minimize the processor intervention during data transfers. The USB device port handles connectivity to a PC for system updates and maintenance.
8-level Priority Interrupt Controller -- The ARM9 interrupt control scheme is insufficient to meet the demands of interrupt-driven real time systems. Atmel has enhanced this scheme with an 8- level priority, individually maskable, vectored interrupt controller that can handle up to 32 internal or external interrupt sources. Interrupt response time is reduced to a minimum.
System Controller Supports Real-time Applications -- The AT91SAM9261 has a system controller with a full complement of supervisory functions including the advanced interrupt controller, timing sources (oscillator, PLLs), real-time periodic interval and watchdog timers, reset and shutdown controllers, backup registers and real-time timer, a power management controller, a debug unit, and PIO controllers that multiplex the I/O lines. The system controller also provides configurable clocks to the processor core and each of the individual peripherals at the appropriate rates. It also sources four programmable output clocks and enables the core and selected peripherals to be placed in idle mode to minimize power consumption.
Peripherals -- AT91SAM9261 peripherals include periodic interval timer, watchdog timer, real time timer, three 32-bit parallel I/O controllers, SD- and Multimedia-compliant Multimedia Card interface (MMC), three synchronous serial controllers, three USARTS, one debug UART, two master/slave Serial Peripheral Interfaces (SPI), a three-channel 16-bit timer/counter, Two-Wire Interface (TWI) and IEEE 1149.1 JTAG Boundary SCAN on all digital pins.
Application Development Tools -- The AT91SAM9261-EK low-cost evaluation kit supports the AT91SAM9261 and its industry-standard ARM architecture gives it compatibility with a wide range of development tools, compilers and debuggers from industry-leading third-party suppliers.
Packaging and Availability -- The AT91SAM9261 is available now in a 217-ball LFBGA RoHS-compliant package and is priced at sub US$10 in high volume.
Footnotes:
DECT= Digital Enhanced Cordless TelecommunicationsAbout Atmel
Atmel is a worldwide leader in the design and manufacture of microcontrollers, advanced logic, mixed-signal, nonvolatile memory and radio frequency (RF) components. Leveraging one of the industry's broadest intellectual property (IP) technology portfolios, Atmel is able to provide the electronics industry with complete system solutions. Focused on consumer, industrial, security, communications, computing and automotive markets, Atmel ICs can be found Everywhere You Are(R).
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Information
Atmel's AT91SAM9261 product information is available at http://www.atmel.com/products/AT91/ or by Email from at91support@atmel.com.
Press Contacts
Peter Bishop, Communications Manager, Atmel Rousset,
Tel: +33-0-4-42-53-61-50, Email: peter.bishop@rfo.atmel.com
Veronique Sablereau, Corporate Communications Manager - Europe,
Tel: +33-0-1-30-60-70-68, Email: veronique.sablereau@atmel.com
Clive Over, Director of Press Relations - USA and Asia,
Tel: +1-408-451-2855, Email: cliveover@atmel.comWeb site: http://www.atmel.com
Contact:
Peter Bishop, Communications Manager of Atmel Rousset,
+33-0-4-42-53-61-50, or peter.bishop@rfo.atmel.com, or Veronique
Sablereau, Corporate Communications Manager, Europe,
+33-0-1-30-60-70-68, or veronique.sablereau@atmel.com, or Clive Over,
Director of Press Relations, USA and Asia, +1-408-451-2855, or
cliveover@atmel.com, both of Atmel