LSI Logic Sets New Logic and Memory Standard With RapidChip Integrator2 Family
Milpitas, California (ots/PRNewswire)
- RapidChip Integrator2 addresses applications traditionally considered only for cell-based ASIC (http://www.lsilogic.com/rapidchip)
MILPITAS, California, January 17 /PRNewswire/ --
- Abundance of logic and an innovative memory architecture called Matrix RAM enables integration of multiple FPGAs into a single RapidChip Integrator2 slice, reducing board complexity and component costs
MILPITAS, California, January 17 /PRNewswire/ --
- RapidChip Integrator2 I/O technology enables a comprehensive set of industry standard interfaces
LSI Logic Corporation (NYSE: LSI) today announced the availability of its RapidChip Integrator2(TM) Platform ASIC family, providing designers with 8 new slices ranging from 1.2 to 5.6 million gates of logic and up to 8 megabits of embedded Matrix RAM. The Matrix RAM technology provides architectural flexibility for memory in high through-put designs.
The RapidChip Integrator2 family enables high performance networking and switching applications, crucial requirements in the communications and storage markets. In addition, medical, industrial and military system designers can also benefit from using the RapidChip Integrator2 family. The family's I/Os support high speed memory interfaces such as DDR2, RLDRAM2, QDR2 and FCRAM2.
"With the RapidChip Integrator2 family of Platform ASICs, designers of complex SoCs have access to integration capabilities that were previously available only in cell-based ASIC implementations," said Yousef Khalilollahi, director RapidChip(R) Marketing, LSI Logic. "In addition, the RapidChip Integrator2 family, with enhanced logic and memory resources, enables the integration of multiple FPGAs into a single Platform ASIC, thereby delivering significant savings in component costs and board area."
The RapidChip Integrator2 technology enables customers to integrate multiple FPGAs into one RapidChip Integrator2 slice, gaining the added benefit of upgrading from DDR1 to DDR2 interfaces and taking advantage of ASIC-like density with lower power consumption and higher performance at an affordable unit cost.
Matrix-RAM Blocks of Memory
The Matrix RAM memory block architecture used in the RapidChip Integrator2 family consists of a matrix of many 2-port memories (up to 124 in one block). These memories can be easily configured to be individual memories or combined together to form larger memories. This approach provides shallow and very wide memories or narrow and very deep memories that can be configured to fit design needs. Because the memories are grouped closely together in the Matrix they are extremely fast and routing overhead is low. Matrix RAM enables system designers to meet many diverse requirements including those in high performance communications and storage networking applications.
RapidChip Integrator2 I/O: Second Generation of Industry Interface Standards
The RapidChip Integrator2 family is ideally suited for the most demanding high I/O bandwidth applications with its second generation RapidChip Integrator2 I/O technology. RapidChip Integrator2 I/O supports the RLDRAM2 and FCRAM2 low latency memory interfaces required in high performance networking applications, the QDR high bandwidth memory interface primarily used in storage networking applications, and DDR2, which is fast becoming the industry's most common interface standard. In addition, RapidChip Integrator2 offers superior support for on-die termination, slew rate and source impedance control for improved signal integrity.
"Platform ASICs are clearly an important design solution for the future," said Dr. Handel Jones, founder and CEO of International Business Strategies. "With the introduction of the RapidChip Integrator2, LSI Logic has advanced memory, logic and I/O resources, providing the unique benefit of design flexibility with platform features and price points better than those available with competing solutions."
About RapidChip
The RapidChip Platform ASIC combines the high-density, high-performance benefits of cell-based ASICs with the fast time-to-market and customization benefits of FPGAs, and the proven IP benefits of ASSPs. Targeting the communications, storage, consumer and other markets, RapidChip Platform ASICs use LSI Logic's high-performance field-tested CoreWare(R) IP, customizable logic, embedded memory, and innovative design concepts to significantly reduce time-to-revenue, design and manufacturing risk and costs. RapidChip Platform ASICs also provide a fast and seamless migration path to full cell-based ASIC -- driving unit costs even lower.
Unique to RapidChip Platform ASICs is the customer-friendly interface that dramatically simplifies the underlying complexity of the design tools and flows associated with SoC design. Rule sets automatically manage architectural design, verification, and physical design. As a result, design schedules for high- performance chips are very predictable. Information on RapidChip technology is available through LSI Logic's direct sales channels and worldwide distribution partners.
About LSI Logic Corporation
LSI Logic Corporation focuses on the design and production of high-performance semiconductors for Consumer, Communications and Storage applications that access, interconnect and store data, voice and video. LSI Logic engineers incorporate reusable, industry-standard intellectual property building blocks that serve as the heart of leading-edge systems. LSI Logic serves its global OEM, channel and distribution customers with Platform ASICs, standard-cell ASICs, standard products, host bus adapters, RAID controllers and software. In addition, the company supplies storage network solutions for the enterprise. LSI Logic is headquartered at 1621 Barber Lane, Milpitas, CA 95035. http://www.lsilogic.com .
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Contact:
Diana Hodges of LSI Logic Corporation, +1-408-433-4245, or
dhodges@lsil.com; or Linda Capcara of Brodeur, +1-602-808-1166, or
lcapcara@brodeur.com, for LSI Logic Corporation/